Title :
Multi-FPGA emulation of a 48-cores multiprocessor with NOC
Author :
Li, Xinyu ; Hammami, Omar
Author_Institution :
ENSTA ParisTech, Paris
Abstract :
Design productivity is one the most important challenge facing future generation multiprocessor system on chip (MPSOC). The modeling of dozens of interconnected IPs with distributed memories implies intensive manual EDA based design activity. We propose to improve design productivity by raising IP reuse to small scale multiprocessor IP combined with fast extension techniques for system level design automation in the framework of multi-FPGA based emulator. A design case study of a 48-processors multiprocessor on 4 large scale FPGA based industry class emulator validates our approach.
Keywords :
distributed memory systems; field programmable gate arrays; logic design; network-on-chip; IP interconnection; MPSOC; design productivity; distributed memories; multi-FPGA emulation; multiprocessor system on chip; Design automation; Electronic design automation and methodology; Emulation; Field programmable gate arrays; Large-scale systems; Multiprocessing systems; Network-on-a-chip; Productivity; System-level design; System-on-a-chip; Emulation; MPSOC; Multi-FPGA; NoC;
Conference_Titel :
Design and Test Workshop, 2008. IDT 2008. 3rd International
Conference_Location :
Monastir
Print_ISBN :
978-1-4244-3479-4
Electronic_ISBN :
978-1-4244-3478-7
DOI :
10.1109/IDT.2008.4802498
