Title :
Behavioral partitioning with exploiting function-level parallelism
Author :
Hara, Yuko ; Tomiyama, Hiroyuki ; Honda, Shinya ; Takada, Hiroaki ; Ishii, Katsuya
Author_Institution :
Grad. Sch. of Inf. Sci., Nagoya Univ., Nagoya
Abstract :
This paper proposes a method to efficiently generate hardware from a large behavioral description by behavioral synthesis. For a program with functions which are executable in parallel, this proposed method determines an optimal behavioral partitioning which fully exploits the function-level parallelism with simultaneously minimizing the area in the datapath and control path. This partitioning problem is formulated as an integer programming problem. Experimental results demonstrate the effectiveness of our proposed method.
Keywords :
integer programming; logic partitioning; minimisation; parallel programming; behavioral partitioning; behavioral synthesis; control path; datapath; exploiting function-level parallelism; integer programming problem; minimization; partitioning problem; Adders; Circuit synthesis; Degradation; Delay effects; Hardware design languages; Information science; Large scale integration; Linear programming; Optimal control;
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
DOI :
10.1109/SOCDC.2008.4815588