Performance evaluation of a reconfigurable instruction set processor

Author

Mehdipour, Farhad ; Noori, Hamid ; Honda, Hiroaki ; Inoue, Koji ; Murakami, Kazuaki

Author_Institution

Res. Inst. for Inf. Technol., Kyushu Univ., Fukuoka

Volume

01

fYear

2008

fDate

24-25 Nov. 2008

Abstract

Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. A combined analytical and simulation-based model (CAnSO*) is proposed and validated for performance evaluation of a typical reconfigurable instruction set processor. The proposed model consists of an analytical core that incorporates statistics gathered from cycle-accurate simulation to make a reasonable evaluation. CAnSO has clear speed advantages and compared to cycle-accurate simulation, it proves almost 2% variation in the speedup measurement.

Keywords

calibration; instruction sets; microprocessor chips; optimisation; performance evaluation; reconfigurable architectures; analytical modeling; calibration; combined analytical and simulation-based model; optimization; performance evaluation; reconfigurable instruction set processors; Analytical models; Computational Intelligence Society; Design optimization; High performance computing; Informatics; Information technology; Performance analysis; Space exploration; Statistical analysis; Velocity measurement; Reconfigurable instruction set processors; analytical modeling; performance evaluation;

fLanguage

English

Publisher

ieee

Conference_Titel

SoC Design Conference, 2008. ISOCC '08. International

Conference_Location

Busan

Print_ISBN

978-1-4244-2598-3

Electronic_ISBN

978-1-4244-2599-0

Type

conf

DOI

10.1109/SOCDC.2008.4815603

Filename

4815603