TunableVP: A Tunable Virtual Platform for easy SoC design space exploration

Platform-based system-on-chip (SoC) design has been a commonly used design methodology for billion-transistor SoC coupled with short time to market requirement. One main issue of the system level design in a platform-based SoC is to determine the system architecture that meets the design goals. To avoid over-design, or a design that cannot meet the design goals, a tool with the ability to provide the performance/power estimation for the whole system is critical. In this paper, we developed a tool, named TunableVP (Tunable Virtual Platform), that allows an SoC designer to evaluate system-level energy/performance tradeoff at the early stage of design cycle.