Title : 
an optimized rendering algorithm for hardware implementation of openVG 2D vector graphics
         
        
            Author : 
Cha, Kilhyung ; Kim, Daewoong ; Chae, Soo-Ik
         
        
            Author_Institution : 
Electr. Eng. & Comput. Sci. Dept., Seoul Nat. Univ., Seoul
         
        
        
        
        
            Abstract : 
An optimized rendering algorithm of the OpenVG 2D vector graphics for hardware implementation is presented in this paper. In the rendering algorithm we adopted a hybrid of raster and vector rendering, which uses vector rendering only within each scanline, to reduce both the number of external memory accesses and the computational complexity. We implemented a hardware accelerator with the proposed algorithm. Experimental results show that our hardware accelerator can handle 11.8 fps of Tiger image for a QVGA panel at the operating clock frequency of 100 MHz.
         
        
            Keywords : 
application program interfaces; rendering (computer graphics); OpenVG 2D vector graphics; computational complexity; optimized rendering algorithm; vector rendering; Clocks; Computational complexity; Computer graphics; Field programmable gate arrays; Frequency; Hardware; Image segmentation; Paints; Pixel; Rendering (computer graphics); 2D Vector Graphics Hardware Accelerator; OpenVG;
         
        
        
        
            Conference_Titel : 
SoC Design Conference, 2008. ISOCC '08. International
         
        
            Conference_Location : 
Busan
         
        
            Print_ISBN : 
978-1-4244-2598-3
         
        
            Electronic_ISBN : 
978-1-4244-2599-0
         
        
        
            DOI : 
10.1109/SOCDC.2008.4815641