A design of DisplayPort link layer

This paper presents an implementation of DisplayPort 1.1 Link Layer. The DisplayPort link layer provides isochronous transport service, link service, and device service. Isochronous transport service in source device maps the video and audio streams into the main link under a set of rules, so that the stream can be properly reconstructed to original format and synchronized by the sink device. The link service is used for discovering, configuring, and maintaining the link by accessing DPCD via AUX CH. The main link transmitter and receiver is implemented with 4,820 ALUTs and 4496 register, 557,110 of block memory bits synthesized using Quartus II at Altera Stratix II GX board and can be operated at 200.32 MHz. Also, the AUX-CH block is implemented with 765 ALUTs and 298 register, respectively.