High-gain on-chip antennas for LSI intra-/inter-chip wireless interconnection

A wireless interconnection technology using on-chip antennas has been proposed for three dimensional packaging of LSI chips. The issues of on-chip antennas are extremely low gain due to lossy Si substrates. In this study, we developed a high gain on-chip antenna structure by thinning the Si substrate thickness and optimizing interposer thickness underlying the Si substrate. The transmission coefficient increased from -93 dB to -31 dB at the distance of 20 mm for inter-chip communication between 180 nm CMOS chips.