DocumentCode :
495426
Title :
Low-Power Adiabatic Pins for Driving Chip Pads
Author :
Hu, Jianping ; Liu, Binbin ; Zhou, Dong ; Luo, Xiaoyan
Author_Institution :
Fac. of Inf. Sci. & Technol., Ningbo Univ., Ningbo, China
Volume :
3
fYear :
2009
fDate :
March 31 2009-April 2 2009
Firstpage :
408
Lastpage :
412
Abstract :
The conventional CMOS pins consume very large energy when driving chip pads because of large load capacitances. This paper reports two adiabatic pad cells for driving the chip pads. The proposed adiabatic pad cells include mainly chip pads, electrostatic discharge (ESD) protection circuits, and two stage adiabatic buffers that are used to drive the large load capacitances on chip pads. For comparison, a conventional output pad cell is also embedded in the test chip. The function verifications and energy loss tests for the proposed adiabatic output pad cells are carried out. HSPICE post-simulation shows that the proposed two adiabatic output pad cells attain large energy savings, as compared with the conventional counterpart.
Keywords :
CMOS integrated circuits; SPICE; driver circuits; electrostatic discharge; low-power electronics; CMOS pins; HSPICE post-simulation; chip pads; electrostatic discharge protection; energy saving; load capacitances; low-power adiabatic pins; CMOS logic circuits; CMOS technology; Capacitance; Circuit testing; Driver circuits; Electrostatic discharge; Energy dissipation; Energy loss; Pins; Protection; Adiabatic circuits; Low power; Pad cells;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Information Engineering, 2009 WRI World Congress on
Conference_Location :
Los Angeles, CA
Print_ISBN :
978-0-7695-3507-4
Type :
conf
DOI :
10.1109/CSIE.2009.699
Filename :
5170873
Link To Document :
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