DocumentCode
496883
Title
The Researcher and Implement of High-Speed Modular Multiplication Algorithm Basing on Parallel Pipelining
Author
Xiangyan, Fang ; Jiahong, Zhang ; Tinggang, Xiong ; Youguang, Yuan
Author_Institution
Sch. of Comput., Harbin Eng. Univ., Harbin, China
Volume
1
fYear
2009
fDate
18-19 July 2009
Firstpage
398
Lastpage
403
Abstract
This page presents an improving method which realizes parallel operation in cell arithmetic unit and between cell arithmetic units to improve the speed of Montgomery modular multiplication algorithmic. Firstly, every cycle of Montgomery modular multiplication algorithmic has two parallel multiplication by improving Montgomery algorithmic; secondly, multi-cycle pipelining parallel computers by making the best of multiplication; last, the clock period number of finishing a large numbers modular multiplication operation is (e2 - e)/m + 4 by implementing Montgomery algorithmic with parallel pipelining. Which e = ?n/w?, n is the width of multiplier, w is slice width of multiplier, m is parallel degree of cycle pipelining. The method improves not only the speed of Montgomery modular multiplication algorithmic, but also is fit to the configure implementing of resource and speed.
Keywords
parallel architectures; pipeline arithmetic; Montgomery algorithm; Montgomery modular multiplication; cell arithmetic unit; high-speed modular multiplication; modular multiplication operation; multicycle pipelining parallel computer; parallel multiplication; parallel operation; parallel pipelining; Application software; Clocks; Concurrent computing; Digital arithmetic; Finishing; Information processing; Pipeline processing; Public key; Public key cryptography; Shipbuilding industry; modular multiplication algorithm; parallel;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Processing, 2009. APCIP 2009. Asia-Pacific Conference on
Conference_Location
Shenzhen
Print_ISBN
978-0-7695-3699-6
Type
conf
DOI
10.1109/APCIP.2009.107
Filename
5197080
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