DocumentCode
497185
Title
NiO resistance change memory with a novel structure for 3D integration and improved confinement of conduction path
Author
Lee, Byoungil ; Wong, H. -S Philip
Author_Institution
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
fYear
2009
fDate
16-18 June 2009
Firstpage
28
Lastpage
29
Abstract
We demonstrated a novel 3D integration compatible structure for NiO nonvolatile memory. In this new structure, the programming area does not involve the surface of the NiO film, thus, device characteristics would be more consistent. Its scalability has been proven down to a 48nm X 48nm cell size. The focused E-field in this structure improves the confinement of the conduction path and results in better uniformity in the LRS of the NiO memory cells. Furthermore, this new structure showed a lower RESET current (~90 muA) and better ON/OFF margin than the conventional structure.
Keywords
nickel compounds; random-access storage; 3D integration compatible structure; E-field; NiO; conduction path; low RESET current; nonvolatile memory; resistance change memory; Annealing; Dielectric devices; Electric resistance; Electrodes; Metal-insulator structures; Nonvolatile memory; Scalability; Tellurium; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2009 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-3308-7
Type
conf
Filename
5200622
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