Title :
Pipe-shaped BiCS flash memory with 16 stacked layers and multi-level-cell operation for ultra high density storage devices
Author :
Katsumata, Ryota ; Kito, Masaru ; Fukuzumi, Yoshiaki ; Kido, Masaru ; Tanaka, Hiroyasu ; Komori, Yosuke ; Ishiduki, Megumi ; Matsunami, Junya ; Fujiwara, Tomoko ; Nagata, Yuzo ; Zhang, Li ; Iwata, Yoshihisa ; Kirisawa, Ryouhei ; Aochi, Hideaki ; Nitayama,
Author_Institution :
Center for Semicond. R&D, Toshiba Corp., Yokohama, Japan
Abstract :
We propose pipe-shaped bit cost scalable (P-BiCS) flash memory which consists of pipe-shaped NAND strings folded like a u-shape instead of the straight-shape. P-BiCS flash technology achieves a highly reliable memory film of which the program and erase (P/E) operation is managed by Fowler-Nordheim (FN) tunneling, that is originated by the strong curvature effect of its small pipe radius, a low resistance source line by the layered metal wirings and a tightly controlled diffusion profile for the select-gate (SG) transistor due to low thermal budget. The effective 1-bit cell area of 0.00082 mum2 and its functionality are successfully demonstrated using the 32 Gbit test chip with the 3-dimensionally 16 stacked layers and the multi-level-cell (MLC) operation by 60 nm P-BiCS flash technology.
Keywords :
NAND circuits; flash memories; tunnelling; Fowler-Nordheim tunneling; NAND strings; curvature effect; layered metal wiring; low resistance source line; low thermal budget; multilevel cell operation; pipe-shaped BiCS flash memory; pipe-shaped bit cost scalable flash memory; program and erase operation; select-gate transistor; storage capacity 32 Gbit; ultra high density storage devices; Costs; Financial management; Flash memory; Memory management; Technology management; Testing; Thermal management; Thermal resistance; Tunneling; Wiring;
Conference_Titel :
VLSI Technology, 2009 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-3308-7
