• DocumentCode
    497951
  • Title

    A 40-Gb/s transmitter with 4∶1 MUX and subharmonically injection-locked CMU in 90-nm CMOS technology

  • Author

    Wang, Huaide ; Lee, Jri

  • Author_Institution
    National Taiwan University, Taipei, Taiwan
  • fYear
    2009
  • fDate
    16-18 June 2009
  • Firstpage
    48
  • Lastpage
    49
  • Abstract
    A low-power low-jitter 40-Gb/s transmitter incorporating triple-resonance technique and subharmonically injection-locked CMU is presented. Designed and fabricated in 90-nm CMOS technology, this chip provides 4∶1 multiplexing and achieves 454 fs,rms output data jitter while consuming only 325 mW from a 1.5-V supply.
  • Keywords
    Bandwidth; CMOS technology; Clocks; Delay; Energy consumption; Injection-locked oscillators; Jitter; Parasitic capacitance; Phase noise; Transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2009 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    978-1-4244-3307-0
  • Electronic_ISBN
    978-4-86348-001-8
  • Type

    conf

  • Filename
    5205298
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=497951