Title :
A 12-bit vernier ring time-to-digital converter in 0.13μm CMOS technology
Author :
Yu, Jianjun ; Dai, Fa Foster ; Jaeger, Richard C.
Author_Institution :
Department of Electrical and Computer Engineering, Auburn University, 200 Broun Hall, AL 36849, USA
Abstract :
A novel 12-bit Vernier ring time-to-digital converter (TDC) with 8ps of time resolution for digital-phase-locked-loop applications is presented. The TDC achieves a large detectable range of 32ns. The core of the TDC occupies 0.75 × 0.35 mm2 in a 0.13um CMOS technology. The total power consumption for the entire TDC chip is only 7.5mW with a 1.5V power supply at a sample rate of 15MSps.
Keywords :
CMOS technology; Counting circuits; Decoding; Delay effects; Energy consumption; Inverters; Noise measurement; Output feedback; Signal resolution; Time measurement;
Conference_Titel :
VLSI Circuits, 2009 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-1-4244-3307-0
Electronic_ISBN :
978-4-86348-001-8
