• DocumentCode
    498001
  • Title

    Multi-phase 1GHz voltage doubler charge-pump in 32nm logic process

  • Author

    Somasekhar, Dinesh ; Srinivasan, Balaji ; Pandya, Gunjan ; Hamzaoglu, Fatih ; Khellah, Muhammad ; Karnik, Tanay ; Zhang, Kevin

  • Author_Institution
    Intel Corporation, Hillsboro, OR USA
  • fYear
    2009
  • fDate
    16-18 June 2009
  • Firstpage
    196
  • Lastpage
    197
  • Abstract
    Multi-phase 1GHz charge-pump in 32nm logic process demonstrates a compact area (159X42µm2) for boosting 2Vth to 3–4Vth. Self contained clocking with metal-finger capacitors enable embedding voltage boost functionality in close proximity to digital logic for supplying low current Vmin requirement of logic blocks. Multi-phase operation avoids the need for a storage reservoir capacitor, enables fast (5ns) ON/OFF output transition, and provides a gated power delivery solution for blocks having state-preservation Vmin requirements. Charge pump operates as 1V to 2V doubler with ≫5mA capability.
  • Keywords
    Boosting; Capacitors; Charge pumps; Clocks; Current supplies; Logic; Rails; Reservoirs; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2009 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    978-1-4244-3307-0
  • Electronic_ISBN
    978-4-86348-001-8
  • Type

    conf

  • Filename
    5205362