Title :
A Digital offset-compensation scheme for an LA and CDR in 65-nm CMOS
Author :
McLeod, Scott ; Sheikholeslami, Ali ; Yamamoto, Takuji ; Nedovic, Nikola ; Tamura, Hirotaka ; Walker, William W.
Author_Institution :
Dept. of Electrical Engineering, University of Toronto, Canada
Abstract :
A digital offset-compensation scheme for a limiting amplifier (LA) and CDR is presented. The proposed scheme detects the LA offset by sampling the CDR recovered clock with the LA output. The scheme eliminates offset-induced data jitter and compensates offset even for levels that saturate the LA output and cause the CDR not to lock. The compensation circuitry consumes 7.2 mW and occupies 160×110 µm2, a third the area of the LA.
Keywords :
Bandwidth; Clocks; Counting circuits; Jitter; Laboratories; Optical amplifiers; Optical receivers; SONET; Sampling methods; Voltage;
Conference_Titel :
VLSI Circuits, 2009 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-1-4244-3307-0
Electronic_ISBN :
978-4-86348-001-8
