DocumentCode :
498149
Title :
Design of reconfigurable receiver for HF surface wave radar
Author :
Bai, Liyun ; Wen, Biyang ; Yang, Jing ; Shen, Wei
Author_Institution :
Electronic Information School, Wuhan University, China
fYear :
2006
fDate :
18-21 July 2006
Firstpage :
226
Lastpage :
229
Abstract :
The paper describes the design of receiving system for short-range high frequency surface wave radar, which employs monopole/cross-loop antenna (one monopole and two cross-loops). The frequency synthesis of system is provides by two DDS chips, whose working clock comes from the same clock source. The signals offered by DDS is one for RF and the other for LO. By applying mixer- free demodulation and digital down conversion based on software, a reconfigurable radar receiver can be designed. The tasks of digital signal processing is finished by single ADSP21060. This paper presents the principle and design method of IF digital radar receivers based on single digital signal processor. Field experiments proved the radar system canwork successfully.
Keywords :
DDC; DSP; HF radar; receiver;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Ionospheric Radio Systems and Techniques, 2006. IRST 2006. 10th IET International Conference on
Conference_Location :
Beijing
ISSN :
0537-9989
Print_ISBN :
0-86341-659-4
Type :
conf
Filename :
5206453
Link To Document :
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