• DocumentCode
    499175
  • Title

    Framework for performance analysis of RTOS-enabled embedded systems on FPGA

  • Author

    Gardezi, Ailia F. ; Ahsan, Muhammad Numan ; Masud, Shahid

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Lahore Univ. of Manage. Sci., Lahore, Pakistan
  • Volume
    41
  • fYear
    2009
  • fDate
    13-16 July 2009
  • Firstpage
    35
  • Lastpage
    40
  • Abstract
    Over the past decade, the consumer market has been flooded with variegated embedded devices that are progressively becoming cheaper, faster and more power-efficient. New applications are constantly appended into these devices. This work is aimed at emulating such devices using some benchmarks and observing the performance gains that can be achieved by modifications to the design of different hardware as well as software components. We present a modular environment where new tasks can be flexibly incorporated into the proposed framework. Leon-3 soft core microprocessor core and RTEMS real time operating system (RTOS) have been employed in the experiments. The system was implemented on a Xilinx FPGA and also tested using the TSIM2 simulator. Using this framework, we have demonstrated an example which optimizes time slices allocated by RTOS to different applications in an embedded device. In particular, we have shown that at a certain optimal value, the performance in terms of execution time attains a steady state. The framework can be extended to include a range of reconfigurable platforms, embedded processors, RTOS and corresponding applications.
  • Keywords
    embedded systems; field programmable gate arrays; microprocessor chips; operating systems (computers); optimisation; FPGA; Leon-3 soft core microprocessor core; RTEMS real time operating system; RTOS-enabled embedded system; TSIM2 simulator; embedded processor; field programmable gate array; hardware component; optimized time slice allocation; performance analysis; reconfigurable platform; software component; Application software; Embedded system; Field programmable gate arrays; Hardware; Microprocessors; Operating systems; Performance analysis; Performance gain; Real time systems; Software performance; Embedded Systems; Instruction Set Simulation; RTOS; Real-time Performance; Reconfigurable Processor Cores;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Performance Evaluation of Computer & Telecommunication Systems, 2009. SPECTS 2009. International Symposium on
  • Conference_Location
    Istanbul
  • Print_ISBN
    978-1-4244-4165-5
  • Electronic_ISBN
    978-1-56555-328-6
  • Type

    conf

  • Filename
    5224146