• DocumentCode
    500809
  • Title

    Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts

  • Author

    Jain, Himanshu ; Clarke, Edmund M.

  • Author_Institution
    Verification Group, Synopsys, Inc., Mountain View, CA, USA
  • fYear
    2009
  • fDate
    26-31 July 2009
  • Firstpage
    563
  • Lastpage
    568
  • Abstract
    Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solvers are based on the Davis-Putnam-Logemann-Loveland (DPLL) algorithm and require the input formula to be in conjunctive normal form (CNF). We present a new SAT solver that operates on the negation normal form (NNF) of the given Boolean formulas/circuits. The NNF of a formula is usually more succinct than the CNF of the formula in terms of the number of variables. Our algorithm applies the DPLL algorithm to the graph-based representations of NNF formulas. We adapt the idea of the two-watched-literal scheme from CNF SAT solvers in order to efficiently carry out Boolean Constraint Propagation (BCP), a key task in the DPLL algorithm. We evaluate the new solver on a large collection of Boolean circuit benchmarks obtained from formal verification problems. The new solver outperforms the top solvers of the SAT 2007 competition and SAT-Race 2008 in terms of run time on a large majority of the benchmarks.
  • Keywords
    Boolean functions; circuit testing; computability; constraint handling; graph theory; Boolean circuit; Boolean constraint propagation; Boolean satisfiability formula checking; Davis-Putnam-Logemann-Loveland algorithm; SAT; conjunctive normal form; formal verification; graph-based representation; hardware-software verification tool; negation normal form; nonclausal formula; watched cuts; Boolean functions; Business continuity; Circuits; Computer science; Data structures; Formal verification; Hardware; Logic testing; Permission; Software tools; Boolean Satisfiability; DPLL; NNF; Verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-6055-8497-3
  • Type

    conf

  • Filename
    5227064