DocumentCode
500820
Title
Serial reconfigurable mismatch-tolerant clock distribution
Author
Chattopadhyay, Atanu ; Zilic, Zeljko
Author_Institution
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
fYear
2009
fDate
26-31 July 2009
Firstpage
611
Lastpage
612
Abstract
We present an unconventional clock distribution that emphasizes flexibility and layout independence. It suits a variety of applications, clock domain shapes and sizes using a modular standard cell approach that compensates intra-die temperature and process variances. Our clock distribution provides control over regional clock skew, permits use in benbeneficial skew applications and facilitates silicon-debug. By addingeficial skew applications and facilitates silicon-debug. By adding routing to the serial clock network, we permit post-silicon resizing and reshaping of clock domains. Defective sections of the clock network can be bypassed, providing post silicon repair capability to the network.
Keywords
clocks; network routing; clock skew; intra-die temperature compensation; layout independence; modular standard cell approach; post-silicon resizing; serial clock network; Circuit testing; Clocks; Delay lines; Detectors; Integrated circuit interconnections; Integrated circuit reliability; Phase detection; Routing; Shape; Yarn; Clock networks; clock skew; process variation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
978-1-6055-8497-3
Type
conf
Filename
5227076
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