• DocumentCode
    500833
  • Title

    The day Sherlock Holmes decided to do EDA

  • Author

    Veneris, Andreas ; Safarpour, Sean

  • Author_Institution
    ECE Dept., Univ. of Toronto, Toronto, ON, Canada
  • fYear
    2009
  • fDate
    26-31 July 2009
  • Firstpage
    631
  • Lastpage
    634
  • Abstract
    Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and budgetary constraints. A fundamental aspect of the design process that remains primitive is that of debugging. It takes months to close, it introduces costs and it may jeopardize the release date of the chip. This paper reviews the debugging problem and the research behind it over the past 20 years. The case for automated RTL debug tools and methodologies is also made to help ease the manual burden and complement current industrial verification practices.
  • Keywords
    circuit CAD; integrated circuit design; time to market; EDA; automated RTL debug tools; chip design; industrial verification; integrated circuits; semiconductor design companies; time-to-market schedule; Chip scale packaging; Costs; Debugging; Design engineering; Electronic design automation and methodology; Hardware design languages; Pain; Process design; Silicon; Very large scale integration; Debugging; Error Localization; Verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-6055-8497-3
  • Type

    conf

  • Filename
    5227090