On systematic illegal state identification for pseudo-functional testing

The discrepancy between integrated circuits´ activities in normal functional mode and that in structural test mode has an increasing adverse impact on the effectiveness of manufacturing test. Pseudo-functional testing tries to resolve this problem by identifying illegal states in functional mode and avoiding them during the test pattern generation process. Existing methods, however, can only extract a small set of illegal states in the system due to various limitations. In this paper, we first show that illegal states in the system are mainly caused by multi-fanout nets in the circuit, and we develop efficient and effective heuristics to identify them. Experimental results on benchmark circuits demonstrate the effectiveness of our proposed systematic solution.