• DocumentCode
    500882
  • Title

    Digital VLSI logic technology using Carbon Nanotube FETs: Frequently Asked Questions

  • Author

    Patil, Nishant ; Lin, Albert ; Zhang, Jie ; Wong, H. S Philip ; Mitra, Subhasish

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
  • fYear
    2009
  • fDate
    26-31 July 2009
  • Firstpage
    304
  • Lastpage
    309
  • Abstract
    Carbon nanotube field-effect transistors (CNFETs) show promise as extensions to silicon-CMOS. Ideal CNFET circuits can potentially provide 20X energy-delay-product benefits over silicon-CMOS at the 16 nm technology node. However, several challenges must be overcome before such performance benefits can be experimentally realized. In this paper, we present a brief overview of CNFET technology, and address commonly raised concerns through a series of frequently asked questions (FAQs). We also provide a CNFET technology outlook which includes a survey of challenges as well as existing and potential solutions to these challenges.
  • Keywords
    CMOS integrated circuits; VLSI; carbon nanotubes; field effect transistors; carbon nanotube FET; carbon nanotube field-effect transistors; digital VLSI logic technology; energy-delay-product benefits; silicon-CMOS; CMOS technology; CNTFETs; Carbon nanotubes; Circuits; Contacts; Inverters; Lithography; Logic; Silicon; Very large scale integration; CNFET; Carbon Nanotube Transistor; Carbon Nanotubes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-6055-8497-3
  • Type

    conf

  • Filename
    5227139