DocumentCode :
500905
Title :
MPTLsim: A simulator for X86 multicore processors
Author :
Zeng, Hui ; Yourst, Matt ; Ghose, Kanad ; Ponomarev, Dmitry
Author_Institution :
Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
fYear :
2009
fDate :
26-31 July 2009
Firstpage :
226
Lastpage :
231
Abstract :
Current microprocessors are effectively a system-on-a-chip, as they incorporate processing cores, interconnections, shared and private caches and DRAM controllers on a single die. Consequently, it is imperative to have fast and accurate simulation tools for such systems; this paper such a tool for simulating all current and announced variants of multicore processors that use the predominant PC (X86, X86-64) instruction set, as well as external DRAM memory and buses. We discuss the major techniques used for speeding up the simulation and improving the overall accuracy, and the simulation of system-level details such as coherent caches, on-chip interconnections, memory bus and DRAM. We also demonstrate a 8-fold speedup against a widely-used popular tool.
Keywords :
microprocessor chips; system-on-chip; DRAM controllers; DRAM memory; MPTLsim; X86 multicore processors; X86-64; microprocessors; on-chip interconnections; system-on-a-chip; Analytical models; Computational modeling; Hardware; Instruction sets; Microprocessors; Multicore processing; Permission; Random access memory; System-on-a-chip; Virtual machine monitors; Simulator; coherent cache; microprocessor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
978-1-6055-8497-3
Type :
conf
Filename :
5227163
Link To Document :
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