Title :
Design of a 3.1–10.6-GHz low-power CMOS low-noise amplifier for ultra-wideband receivers using standard 0.13 µm CMOS technology
Author :
Ishaac, Nader Albert
Author_Institution :
HUAWEI Technol. Co., Cairo, Egypt
Abstract :
In this paper, we present an ultra-wideband 3.1-10.6 GHz low-noise amplifier employing an input three-section elliptic filter to achieve broadband input matching. The flat gain of the LNA is achieved by the inductor peaking load. The LNA is designed in the standard 0.13 mum CMOS technology. It achieved forward gain (S21) around 10 dB, input return loss (S11) of -9.8 dB, noise figure (NF) of 3.5 dB, input third-order-intercept point (IIP3) of 0.6 dBm, 1-dB compression point (P1dB) of -7.9 dBm, good phase linearity property (group-delay-variation is only plusmn9.4 ps), operates from 1.2 V power supply and consuming 5.4 mW.
Keywords :
CMOS integrated circuits; MMIC amplifiers; elliptic filters; field effect MMIC; integrated circuit design; integrated circuit noise; low noise amplifiers; low-power electronics; microwave filters; radio receivers; wideband amplifiers; CMOS technology; broadband input matching; compression point; forward gain; frequency 3.1 GHz to 10.6 GHz; gain 10 dB; gain 9.8 dB; group-delay-variation; input return loss; input third-order-intercept point; low-power CMOS low-noise amplifier design; noise figure; noise figure 3.5 dB; phase linearity property; power 5.4 mW; size 0.13 mum; three-section elliptic filter; ultra-wideband receivers; voltage 1.2 V; CMOS technology; Impedance matching; Inductors; Linearity; Low-noise amplifiers; Matched filters; Noise figure; Noise measurement; Power supplies; Ultra wideband technology;
Conference_Titel :
Radio Science Conference, 2009. NRSC 2009. National
Conference_Location :
New Cairo
Print_ISBN :
978-1-4244-4214-0
