DocumentCode
501866
Title
The application of Transmission Line Pulse testing for the ESD analysis of integrated circuits
Author
Smedes, T. ; Velghe, R.M.D.A. ; Ruth, R.S. ; Huitsing, A.J.
Author_Institution
Philips Semicond., Nijmegen, Netherlands
fYear
2001
fDate
11-13 Sept. 2001
Firstpage
421
Lastpage
429
Abstract
TLP, well known for device characterisation, applied to full integrated circuits offers valuable data for analysis of ESD behaviour. TLP is the only method to study ESD behaviour during zapping and as such provides knowledge about actual ESD current paths. As illustrated by examples, this gives valuable suggestions for improving circuit designs.
Keywords
electrostatic discharge; integrated circuit design; integrated circuit testing; transmission line matrix methods; ESD analysis; integrated circuits; transmission line pulse testing; Application specific integrated circuits; Circuit analysis; Circuit testing; Distributed parameter circuits; Electrostatic discharge; Integrated circuit testing; Protection; Pulse circuits; Transmission lines; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.
Conference_Location
Portland, OR
Print_ISBN
978-1-5853-7039-9
Electronic_ISBN
978-1-5853-7039-9
Type
conf
Filename
5254936
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