Title :
New ESD protection circuits based on PNP triggering SCR for advanced CMOS device applications
Author :
Morishita, Yasuyuki
Author_Institution :
System ULSI Development Division, NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa, 229-1134, Japan
Abstract :
New silicon controlled rectifier (SCR) structures for ESD protection circuits, with low parasitic capacitance, are proposed. These new SCR structures are triggered by parasitic PNP (not NPN) transistor, with which the anode-cathode spacing (LSCR), the triggering voltage (VTRIG), the holding voltage (VHOLD), and the on-resistance (RON) were reduced successfully, and excellent ESD performance was achieved
Keywords :
Cathodes; Clamps; Coupling circuits; Electrostatic discharge; Parasitic capacitance; Protection; Stress; Thyristors; Variable structure systems; Voltage;
Conference_Titel :
2002 Electrical Overstress/Electrostatic Discharge Symposium, 2002. EOS/ESD '02.
Conference_Location :
Charlotte, NC, USA
Print_ISBN :
978-1-5853-7040-5
Electronic_ISBN :
978-1-5853-7040-5
