Title :
The influence of high resistivity substrates on CMOS latchup robustness
Author :
Voldman, S. ; Gebreselasie, E. ; Liu, X.F. ; Coolbaugh, D. ; Joseph, A.
Author_Institution :
IBM Microelectron., Essex Junction, VT, USA
Abstract :
This paper demonstrates latchup results in a 50 Omega-cm substrate wafer in a 0.13-mum technology. Latchup evaluation will evaluate and compare a 10 Omega-cm and a 50 Omega-cm substrate wafer on the NPN bipolar current gain, betanpn, PNP bipolar current gain, betapnp,, the bipolar current gain product, betapnpbetanpn, undershoot, and overshoot phenomena.
Keywords :
CMOS logic circuits; MOSFET; flip-flops; semiconductor device breakdown; CMOS latchup; MOSFET breakdown; NPN bipolar current gain; PNP bipolar current gain; high-resistivity wafer substrate; overshoot phenomena; resistivity 50 ohmcm; size 0.13 mum; undershoot phenomena; CMOS technology; Conductivity; Crosstalk; Electric breakdown; Electrostatic discharge; Isolation technology; MOSFETs; Robustness; Semiconductor device noise; Substrates;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2005. EOS/ESD '05.
Conference_Location :
Tucson, AZ
Print_ISBN :
978-1-58537-069-6
Electronic_ISBN :
978-1-58537-069-6
