Title :
ESD protection design challenges for a high pin-count alpha microprocessor in a 0.13 μm CMOS SOI technology
Author :
Juliano, Patrick A. ; Anderson, Warren R.
Author_Institution :
Alpha Dev. Group, Hewlett-Packard Corp., Shrewsbury, MA, USA
Abstract :
We illustrate the complexity of designing ESD protection for a 64-bit microprocessor employing 140 million transistors. This IC contains 901 I/O signals, most operating at >1 Gbit/sec/pin, and ten power supplies split into 27 domains. An extensive set of CAD tools used to expedite ESD-related chip assembly and to analyze finished layout is described.
Keywords :
CMOS integrated circuits; electrostatic discharge; microprocessor chips; CAD tools; CMOS SOI technology; ESD protection design; ESD-related chip assembly; I/O signals; pin-count alpha microprocessor; CMOS technology; Circuits; Design automation; Diodes; Electrostatic discharge; MOS devices; Microprocessors; Power supplies; Protection; Voltage;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2003. EOS/ESD '03.
Conference_Location :
Las Vegas, NB
Print_ISBN :
978-1-5853-7057-3
Electronic_ISBN :
978-1-5853-7057-3
