DocumentCode :
503081
Title :
Methods for designing low-leakage power supply clamps
Author :
Maloney, Timothy J. ; Poon, Steven S. ; Clark, Lawrence T.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fYear :
2003
fDate :
21-25 Sept. 2003
Firstpage :
1
Lastpage :
7
Abstract :
Low power semiconductor components require minimizing leakage currents including those from ESD protection circuits. Here, MOSFET ESD power clamps with substantial leakage reduction over previous approaches are presented. Designs are described for core logic circuits and for I/O applications where supply voltages exceed what single gate oxides can reliably sustain.
Keywords :
MOSFET; electrostatic devices; electrostatic discharge; leakage currents; logic design; low-power electronics; power semiconductor devices; power supply circuits; ESD protection circuit; MOSFET ESD power clamps; core logic circuit design; low-leakage power supply clamp design; Clamps; Design methodology; Electrostatic discharge; Leakage current; Logic circuits; MOSFET circuits; Power MOSFET; Power supplies; Protection; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2003. EOS/ESD '03.
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-5853-7057-3
Electronic_ISBN :
978-1-5853-7057-3
Type :
conf
Filename :
5272044
Link To Document :
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