A new methodology for multi-level thermal characterization of complex electronic systems: From die to board level

Thermal management is becoming a major concern in microelectronics because of transistor technology reduction and power density increases within complex packages. Temperature rise due to power dissipation worsens harmful clock skew, jeopardizes reliability and leads to over-consumption because of leakage current dependence on temperature. To limit these risks, electronics engineers have to perform thermal simulations at an early stage of the design flow and for several granularity levels (die, package, PCB, ...). To speed up and ease the thermal characterization process, the engineers need small, accurate and easy-to-generate thermal models, which can be reused at every integration step. Several macro-modeling techniques exist (DELPHI, HotSpot, ...), but they cannot satisfy all the points mentioned above. This paper presents a new methodology called Flex-CTM for flexible compact thermal modeling to build and to interface compact thermal models at different granularity levels. Each part of an electronic system is prepared to be plugged into any other environment and reduced to save memory and time, resulting a thermal micro-model. Therefore, a fast-to-simulate macro-model of a full system can be obtained by assembling the micro-models. The Flex-CTM is found to have number of advantages over both current resistive models (junction-to-case and junction-to-board) and dynamic compact thermal models. The first advantage of coupling models together allows multi-source and dynamic simulations at any design level. The second is the control on the accuracy. The third advantage is the boundary condition independence property to allow architecture exploration. Finally and the most important, micro and macro-models are shared by teams to be reused and completed.