A Hardware Approach for Reducing Interpretation Overhead

An interpreter reads instructions of the source executable and perform each corresponding operation in turn on a software-maintained version of the old ISA´s state. Interpretation has emerged as an important tool with real world applications. Interpretation is always adopted to support instruction set emulation and handle the non-hotspot code in a two-stage dynamic binary translation strategy. An important consideration of an interpreter is the runtime overhead. We investigate that repeated re-decode operations are the bottleneck of interpretation overhead. We propose interpreted code cache (Pcache), a hardware assist, to save the information of the decoded instruction for reuse. We analyze and model Pcache performance via a real interpretation system. Results from SPEC2000 integer benchmarks show that Pcache could significantly reduce re-decode operations and the overhead of interpretation. We demonstrate that the hardware Pcache is a highly effective approach, and the extra overhead is neglectable compared to the performance gains.