DocumentCode
504742
Title
Performance analysis of Vector Delay Lock Loop
Author
Lim, Deok Won ; Kang, Hee Won ; Hwang, Dong-Hwan ; Park, Chansik ; Lee, Sang Jeong
Author_Institution
Dept. of Electron. Eng., Chungnam Nat. Univ., Daejeon, South Korea
fYear
2009
fDate
18-21 Aug. 2009
Firstpage
5046
Lastpage
5049
Abstract
In this paper, a vector delay lock loop (VDLL) which is utilizing navigation results to track code signals is designed in a software GPS receiver. And the performance of it is analyzed in a point of tracking accuracy and compared with that of scalar delay lock loop (SDLL). Moreover the analyzed performance of VDLL is also confirmed by experiments. Finally, the performance of VDLL can be expected for any environments and the loss of lock can be determined by this result.
Keywords
delay lock loops; electrical engineering computing; performance evaluation; scalar delay lock loop; software GPS receiver; vector delay lock loop; Design engineering; Global Positioning System; Oscillators; Performance analysis; Performance loss; Satellite navigation systems; Signal design; Software design; Software performance; Tracking loops; GPS; SDLL; Tracking; VDLL;
fLanguage
English
Publisher
ieee
Conference_Titel
ICCAS-SICE, 2009
Conference_Location
Fukuoka
Print_ISBN
978-4-907764-34-0
Electronic_ISBN
978-4-907764-33-3
Type
conf
Filename
5334600
Link To Document