DocumentCode
505516
Title
Protecting circuits from the transient voltage suppressor´s residual pulse during IEC 61000-4-2 stress
Author
Marum, Steve ; Duvvury, Charvaka ; Park, Jae ; Chadwick, Alan ; Jahanzeb, Agha
Author_Institution
Texas Instrum. Inc, Dallas, TX, USA
fYear
2009
fDate
Aug. 30 2009-Sept. 4 2009
Firstpage
1
Lastpage
10
Abstract
The concept of the ldquoresidual pulserdquo from external IEC 61000-4-2 stress clamps is introduced. Values for this ldquoresidual pulserdquo are determined for some typical transient voltage suppressors. A method of using these data along with an IC´s internal ESD protection to provide complete protection from system level stresses is proposed.
Keywords
IEC standards; electrostatic discharge; surge protection; transients; ESD testing methods; circuit protection; external IEC 61000-4-2 stress clamps; system level stresses; transient voltage suppressor residual pulse; Circuit testing; Clamps; Electrostatic discharge; IEC standards; Integrated circuit modeling; Pins; Protection; Pulse circuits; Residual stresses; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
EOS/ESD Symposium, 2009 31st
Conference_Location
Anaheim, CA
Print_ISBN
978-1-58537-176-1
Electronic_ISBN
978-1-58537-176-1
Type
conf
Filename
5340103
Link To Document