ESD parameter extraction by TLP measurement

This paper is described the ESD protection design technique for the integrated circuits, used the ESD parameter extracted by TLP (Transmission Line Pulsing) measurement. The ESD parameters need to simulate the ESD surge inflow phenomena into the devices accurately. This study find that it is most important for ESD parameter extraction conditions to be selected the suitable TLP calibration method and choose TLP-IV extraction timing to fit its device performance to simulate the ESD model. Also, it is proposed the location analysis method to choose TLP-IV timing as the new extraction in this paper.