• DocumentCode
    50633
  • Title

    An Immune-Algorithm-Based Dead-Time Elimination PWM Control Strategy in a Single-Phase Inverter

  • Author

    Jiaxin Yuan ; Zhen Zhao ; Baichao Chen ; Cong Li ; Jin Wang ; Cuihua Tian ; Yaojun Chen

  • Author_Institution
    Dept. of Electr. Eng., Wuhan Univ., Wuhan, China
  • Volume
    30
  • Issue
    7
  • fYear
    2015
  • fDate
    Jul-15
  • Firstpage
    3964
  • Lastpage
    3975
  • Abstract
    In this paper, an immune algorithm (IA)-based dead-time elimination PWM control strategy is proposed. For existing dead-time elimination applications, one of the major problems is the dead-time control around the zero-current-crossing points. To deal with this problem, this paper proposes a different PWM control method which first restricts the control sequence to a specified level around the zero-crossing zone. Also, the proposed method can improve the current waveform quality by using the IA approach and three-level control strategy. Compared with conventional dead-time elimination methods, this technique has the features of simple hardware requirement and adaptive control. Moreover, this control strategy effectively eliminates the effect of dead-time, while at the same time significantly reducing the total harmonic distortion of output current and improving the amplitude of output RMS value in different modulation indexes and loads conditions. To verify the analysis, an experimental platform based on DSP and field-programmable gate array is built. The simulation and experimental results are given to demonstrate the effectiveness and feasibility of this new method.
  • Keywords
    PWM invertors; adaptive control; digital signal processing chips; field programmable gate arrays; harmonic distortion; three-term control; DSP; PWM control method; RMS value; adaptive control; current waveform quality; dead-time elimination PWM control strategy; dead-time elimination applications; dead-time elimination methods; digital signal processing; field-programmable gate array; immune algorithm; modulation indexes; single-phase inverter; three-level control strategy; total harmonic distortion; zero-crossing zone; zero-current-crossing points; Cloning; Encoding; Hardware; Immune system; Inverters; Pulse width modulation; Switches; Dead-time elimination; harmonic optimization; immune algorithm (IA); three-level control strategy;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/TPEL.2014.2347974
  • Filename
    6888520