Automatic synthesis of reversible logic circuit based on genetic algorithm

The reversible logic circuits (RLC) are a sort of novel circuits which can avoid the information loss and energy dissipation by implementing the reversible logic operations. RLC prohibit the feedback and don´t have the fan-out, so the synthesis methods of RLC are very different from the existing irreversible logic circuits. In this paper, evolutionary design techniques are applied to the synthesis of RLC, and then an automatic synthesis approach of RLC based on genetic algorithm is proposed. Firstly, some appropriate reversible logic gates are chosen as the building-blocks, and a computational array model is built for the synthesis of RLC. According to the array model, the synthesis problems are modeled as the constrained multi-objective optimization problems which are converted into their single-objective equivalents by the weighted sum of objective functions. Then, the single-objective equivalents are solved by a specialized genetic algorithm. The experimental results verify the capability of automatic synthesis of the proposed approach, and show that the proposed approach is feasible and effective.