DocumentCode
507374
Title
Interpolating functions from large Boolean relations
Author
JIang, Jie Hong R ; Lin, Hsuan Po ; Hung, Wei Lun
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2009
fDate
2-5 Nov. 2009
Firstpage
779
Lastpage
784
Abstract
Boolean relations are an important tool in system synthesis and verification to characterize solutions to a set of Boolean constraints. For physical realization as hardware, a deterministic function often has to be extracted from a relation. Prior methods however are unlikely to handle large problem instances. From the scalability standpoint this paper demonstrates how interpolation can be exploited to extend determinization capacity. A comparative study is performed on several proposed computation techniques. Experimental results show that Boolean relations with thousands of variables can be effectively determinized and the extracted functional implementations are of reasonable quality.
Keywords
Boolean functions; interpolation; logic gates; random-access storage; ABC package; AIGs; Boolean relations; RAM; Xeon CPU; and-inverter graphs; deterministic function; interpolation; single-output relation; system synthesis; Binary decision diagrams; Boolean functions; Circuit synthesis; Flexible printed circuits; Hardware; Input variables; Interpolation; Minimization; Scalability; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design - Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-60558-800-1
Electronic_ISBN
1092-3152
Type
conf
Filename
5361207
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