DocumentCode
507439
Title
A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA
Author
Chung, Jaeyong ; Abraham, Jacob A.
Author_Institution
Comput. Eng. Res. Center, Univ. of Texas at Austin, Austin, TX, USA
fYear
2009
fDate
2-5 Nov. 2009
Firstpage
321
Lastpage
327
Abstract
This paper shows that a timing graph has a hierarchy of specially defined subgraphs, based on which we present a technique that captures topological correlation in arbitrary block-based statistical static timing analysis (SSTA). We interpret a timing graph as an algebraic expression made up of addition and maximum operators. We define the division operation on the expression and propose algorithms that modify factors in the expression without expansion. As a result, they produce an expression to derive the latest arrival time with better accuracy in SSTA. Existing techniques handling reconvergent fanouts usually use dependency lists, requiring quadratic space complexity. Instead, the proposed technique has linear space complexity by using a new directed acyclic graph search algorithm. Our results show that it outperforms an existing technique in speed and memory usage with comparable accuracy.
Keywords
correlation methods; statistical analysis; timing circuits; SSTA; acyclic graph search algorithm; algebraic expression; dependency lists; division operation; linear space complexity; quadratic space complexity; specially defined subgraphs; statistical static timing analysis; subgraphs hierarchy; timing graph; topological correlation; Circuits; Clocks; Computational complexity; Computational efficiency; Delay estimation; Fluctuations; Jacobian matrices; Random variables; Timing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design - Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-60558-800-1
Electronic_ISBN
1092-3152
Type
conf
Filename
5361274
Link To Document