• DocumentCode
    507484
  • Title

    A scalable decision procedure for fixed-width bit-vectors

  • Author

    Bruttomesso, Roberto ; Sharygina, Natasha

  • Author_Institution
    Univ. della Svizzera Italiana, Lugano, Switzerland
  • fYear
    2009
  • fDate
    2-5 Nov. 2009
  • Firstpage
    13
  • Lastpage
    20
  • Abstract
    Efficient decision procedures for bit-vectors are essential for modern verification frameworks. This paper describes a new decision procedure for the core theory of bit-vectors that exploits a reduction to equality reasoning. The procedure is embedded in a congruence closure algorithm, whose data structures are extended in order to efficiently manage the relations between bit-vector slicings, modulo equivalence classes. The resulting procedure is incremental, backtrack-able, and proof producing: it can be used as a theory-solver for a lazy SMT schema. Experiments show that our approach is comparable and often superior to bit-blasting on the core fragment, and that it also helps as a theory layer when applied over the full bit-vector theory.
  • Keywords
    data structures; inference mechanisms; program slicing; program verification; bit-vector slicing; data structures; equality reasoning; fixed-width bit-vector theory; lazy SMT schema; modulo equivalence classes; theory-solver; Constraint theory; Data structures; Decision feedback equalizers; Encoding; Hardware; NP-complete problem; Permission; Polynomials; Registers; Surface-mount technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design - Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-60558-800-1
  • Electronic_ISBN
    1092-3152
  • Type

    conf

  • Filename
    5361322