• DocumentCode
    508522
  • Title

    A hardware Gaussian noise generator and evaluation

  • Author

    Song Yuanyuan ; Zeng Tao ; Zeng Dazhi

  • Author_Institution
    Radar Res. Lab., Beijing Inst. of Technol., Beijing
  • fYear
    2009
  • fDate
    20-22 April 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We present a hardware Gaussian noise generator based on the Box-Muller method that provides highly accurate noise samples. The main novelty of this work is the use and precision analysis of CORDIC IPcore on a Xilinx device in computing square root and logarithmic function. The bit- widths of parameters are chosen carefully to enable rapid computation and sufficient precision. The implementation on a Xilinx Virtex-4 XC4VFX100-10 FPGA occupies 1,104 slices, 2 block RAM and 2 DSP48s. It generates two 14-bit noise samples every clock cycle and 400 million samples per second at a clock speed of 200 MHz. The performance can be improved by parallel instances. During the generation of Gaussian noise, we can also get random numbers drawn from uniform distribution, exponential distribution and Rayleigh distribution. The noise generator can be used as a key component in a hardware-based Radar echo simulator to test the sensitivity of the Radio receiver.
  • Keywords
    noise generators; radio receivers; Box-Muller method; CORDIC IPcore; Xilinx device; hardware Gaussian noise generator; hardware-based radar echo simulator; logarithmic function; radio receiver; square root; Box-Muller algorithm; Gaussian random noise; field-programmable gate array; pseudo-random number generator;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Radar Conference, 2009 IET International
  • Conference_Location
    Guilin
  • ISSN
    0537-9989
  • Print_ISBN
    978-1-84919-010-7
  • Type

    conf

  • Filename
    5367385