• DocumentCode
    508786
  • Title

    Parallel realization of high resolution radar on multi-DSP system

  • Author

    Jun Wang ; Wei Wu ; Wenhao Zhang ; Peng Lei ; Wei Li

  • Author_Institution
    Sch. of Electron. & Inf. Eng., Beihang Univ., Beijing
  • fYear
    2009
  • fDate
    20-22 April 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, a pulsed Doppler (PD) radar signal processing algorithm designed to track targets with high velocity is implemented in hardware based on 8 ADSP-TS201 TigerSHARC processors. And both the radar signal processing algorithm and hardware architecture are proposed. To map the algorithm effectively, pipeline optimization on system and instruction levels are adopted, and various factors are taken into consideration, such as system complexity, balance of the task in each processor, communication between processors. Practical experiment proves that both the design of this hardware platform and the realization of algorithm are effective, real-time and reliable.
  • Keywords
    digital signal processing chips; parallel algorithms; radar computing; radar resolution; radar tracking; target tracking; 8 ADSP-TS201 TigerSHARC processor; high resolution radar; multi DSP system; parallel processing algorithm; pipeline optimization; pulsed Doppler radar signal processing algorithm; target tracking; PD radar; parallel processing algorithm; pipeline optimization;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Radar Conference, 2009 IET International
  • Conference_Location
    Guilin
  • ISSN
    0537-9989
  • Print_ISBN
    978-1-84919-010-7
  • Type

    conf

  • Filename
    5367653