DocumentCode :
508951
Title :
Research and Implementation of the Hardware/Software Co-design Based on Structure Test Model of SoC
Author :
Jing Gu ; Chen Zhaohui ; Yu Xiaoyang
Author_Institution :
Inst. of Comput. Sci. & Technol., Harbin Univ. of Sci. & Technol., Harbin, China
Volume :
1
fYear :
2009
fDate :
12-14 Dec. 2009
Firstpage :
526
Lastpage :
530
Abstract :
The structure test of system-on-chip is modeled based on ITC ´02 test benchmark circuits. In this paper, the idea of hardware /software co-design is used for the division and design of hardware and software in SoC testing. The principles of the hardware/software co-design and testing procedures of the structure test model of SoC is introduced in this paper. We present a systematic test specification to restrict the subsequent testing activities in SoC testing. Moreover, the division of TAM and design of IEEE std 1500 wrapper are studied. Finally we put forward an optimization strategy suitable for SoC testing.
Keywords :
hardware-software codesign; logic testing; system-on-chip; IEEE std 1500 wrapper; ITC ´0 2 test benchmark circuits; hardware-software codesign; system-on-chip structure test model; systematic test specification; Benchmark testing; Circuit testing; Computer science; Costs; Hardware; Integrated circuit modeling; Integrated circuit testing; Software testing; System testing; System-on-a-chip; IEEE std 1500; SoC testing; structure test model; the hardware/software co-design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Design, 2009. ISCID '09. Second International Symposium on
Conference_Location :
Changsha
Print_ISBN :
978-0-7695-3865-5
Type :
conf
DOI :
10.1109/ISCID.2009.138
Filename :
5368740
Link To Document :
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