• DocumentCode
    510062
  • Title

    An Improved Bytecode Verification Algorithm on Java Card

  • Author

    Chi Ya Ping ; Li Zhao Bin ; Wang Zhong Hua ; Fang Yong

  • Author_Institution
    Dept. of Commun. Eng., Beijing Electron. Sci. & Technol. Inst., Beijing, China
  • Volume
    1
  • fYear
    2009
  • fDate
    11-14 Dec. 2009
  • Firstpage
    552
  • Lastpage
    555
  • Abstract
    Java applets run on a JVM that check code´s integrity and correctness before execution using a module called bytecode verifier. Large memory space requirements of the verification process blocks implementation of a bytecode verifier embedded in the Java smart card. To address this feasibility problem, the paper desinged a new verification algorithm that optimizes the use of Java smart card´s memory and CPU. The algorithm, inspired to DBG (directed branch graph), is DAG (directed acyclic graph) based and cache-policy-based. As per our lab test, our DAG algorithm has much better performance than DBG algoritm.
  • Keywords
    Java; cache storage; directed graphs; program verification; DAG algorithm; DBG algoritm; Java applets; Java smart card; bytecode verification; cache policy; code correctness; code integrity; directed acyclic graph; directed branch graph; large memory space requirement; Algorithm design and analysis; Dictionaries; Internet; Java; Mobile communication; Security; Smart cards; Space technology; Testing; Upper bound;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Intelligence and Security, 2009. CIS '09. International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-5411-2
  • Type

    conf

  • DOI
    10.1109/CIS.2009.193
  • Filename
    5375903