Metal nanojunctions on silicon single nanowire devices

Direct patterning of silicon dioxide by electron beam lithography is used for the definition of metal nanojunction on wires fabricated on silicon on insulator (SOI) substrates. Devices based on a single silicon nanowire as small as 15 nm and several micrometers long are fabricated by means of a top down process based on electron beam lithography, silicon anisotropic etching and thermal oxidation. A metal gate is defined over a nanoscale opening into the silicon dioxide surrounding the wire obtained by means of the electron beam stimulated oxide etching. The behavior of the device like a silicon nanowire junction field effect transistor (SiNW-JFET) is confirmed by the electrical characterization at room temperature.