Title :
Threshold-voltage variations effects on the reliability of nano-scale CMOS logic gates
Author :
Sulieman, Mawahib Hussein
Author_Institution :
Dept. of Electr. Eng., United Arab Emirates Univ., AlAin, United Arab Emirates
Abstract :
The reliability of nano-scale devices and circuits has received revived attention in recent years. This paper focuses on the reliability at the gate level considering the variations of devices parameters. In particular, this study aims to quantify the effects of threshold voltage variations on the reliability of nanometer-scale CMOS logic gates. The reliability is quantified in terms of the probability-of-failure of individual gates, which is obtained from extensive Monte Carlo simulations of CMOS gates. The study considers the NAND-2 and majority-3 gates at 90 nm and 22 nm, and compares the effects of threshold voltage variations on the reliability of each gate. The results show a clear dependency pattern of reliability on the gate´s input combinations.
Keywords :
CMOS logic circuits; Monte Carlo methods; circuit reliability; logic gates; nanotechnology; Monte Carlo simulations; NAND; gate input combinations; gate level; majority gates; nanoscale CMOS logic gates; nanoscale devices and; probability-of-failure; reliability; size 22 nm; size 90 nm; threshold-voltage variations effects; Adders; CMOS logic circuits; CMOS technology; Fabrication; Logic devices; Logic gates; Nanoscale devices; Parallel processing; Silicon; Threshold voltage; CMOS; Reliability; Threshold-Voltage;
Conference_Titel :
Nanotechnology, 2009. IEEE-NANO 2009. 9th IEEE Conference on
Conference_Location :
Genoa
Print_ISBN :
978-1-4244-4832-6
Electronic_ISBN :
1944-9399