FPGA-based built-in testbed for command interpretations and computational load Distribution

A testbed with built-in data processing capability is presented in this paper. The built-in testbed is designed for a small form factor storage protocol. In the market, there are several dedicated test equipments supporting the protocol of the storage device. However, they are more suitable in the development stage. A built-in testbed which is suitable for both the development stage and production stage will benefit the industry. The most computing power relies on a FPGA, which is with high processing throughput. It releases the test host from the heavy computational load. It makes the dedicated test equipments to be unnecessary, which is eventually replaced by a normal person computer (PC). The hardware architecture of the proposed testbed is described in detail in this paper.