Investigating the effects of the number of stages on phase noise in CMOS ring oscillators

This article focuses on effects of the number of stages on phase noise in CMOS ring oscillators for a given oscillation frequency by comparing several phase noise models. Expressions of phase noise due to white noise and flicker noise in single-ended and differential ring oscillator are described and parameters affecting the phase noise especially the number of stages and gate length are studied. After derivations and analysis, explicit design implications arising form these theories are given for low phase noise design.