Design of wide-bandwidth sigma-delta modulator for wireless transceivers

Author

Choi, Jungsu ; Jang, Kichang ; Lee, Junsang ; Jeong, Wooju ; Park, Jungeui ; Yoon, Jayang ; Lee, Seok ; Choi, Joongho

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Seoul, Seoul, South Korea

fYear

2009

fDate

14-16 Dec. 2009

Firstpage

598

Lastpage

601

Abstract

This paper presents the design of a continuous-time sigma-delta modulator for wide-bandwidth wireless transceiver applications. Several critical design issues for wide-bandwidth signal processing are covered and novel fast on-chip tuning circuit is proposed for maintaining the frequency response. The designed modulator consists of the 3^rd-order single-loop active-RC integrator chain with a 4-bit internal quantizer and dynamic element matching scheme. The modulator of 2MHz bandwidth is fabricated in a 0.18-Â¿m CMOS technology and dissipates 68mW for a supply voltage of 1.8V.

Keywords

CMOS integrated circuits; RC circuits; sigma-delta modulation; transceivers; tuning; 3rd-order single-loop active-RC integrator chain; CMOS technology; fast on-chip tuning circuit; frequency 2 MHz; power 68 muW; voltage 1.8 V; wide-bandwidth sigma-delta modulator; wide-bandwidth signal processing; wide-bandwidth wireless transceiver; Bandwidth; CMOS technology; Circuit optimization; Delta-sigma modulation; Energy consumption; Frequency; Operational amplifiers; Sampling methods; Signal design; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on

Conference_Location

Singapore

Print_ISBN

978-9-8108-2468-6

Type

conf

Filename

5403869