A lightweight memory encryption cache design and implementation for embedded processor

Memory encryption offers a secure protection for the confidentiality of program and data. But implementing an encryption design for embedded processor is much difficult. As the embedded processor is highly constrained by the application requirement, the designers can´t only concern with security. This paper proposes a new lightweight memory encryption cache (MEC) to obtain a balance among the performance, the power and the security. The new cache uses an improved cache structure to cache the pad value and decrease the latency of encryption. Our experiments show that the MEC has an 8.24% performance improvement over the direct encryption scheme in best case, and reduces 25.71% power consumption when the embedded processor writes back to memory, as compared with the OTP (one-time-pad) scheme.