A survey of low-voltage low-power technique and challenge for CMOS signal processing circuits

Author

Hung, Yu-Cherng ; Chen, Jian-Cheng ; Shieh, Shao-Hui ; Tung, Chiou-Kou

Author_Institution

Dept. of Electron. Eng., Nat. Chin-Yi Univ. of Technol., Taiping, Taiwan

fYear

2009

fDate

14-16 Dec. 2009

Firstpage

554

Lastpage

557

Abstract

Due to the hot-electron effect and reliability, it is necessary to reduce the supply voltage of integrated circuit in CMOS sub-micro technologies. Low-voltage low-power circuit design is an important research in recent years. In this paper, the motivation and challenges of CMOS low-voltage low-power circuit are overall addressed. Furthermore, various circuit design techniques are described.

Keywords

CMOS integrated circuits; integrated circuit design; integrated circuit reliability; signal processing; CMOS signal processing circuits; hot-electron effect; low-power circuit design; low-voltage circuit design; reliability; CMOS process; CMOS technology; Circuit synthesis; Energy consumption; Integrated circuit reliability; Integrated circuit technology; Paper technology; Signal processing; Temperature sensors; Voltage; LVLP; low power; low voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on

Conference_Location

Singapore

Print_ISBN

978-9-8108-2468-6

Type

conf

Filename

5403913

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=511841